Phase Locked Loop
In progress
The design and implementation of a high-performance 5.4 GHz Phase-Locked Loop (PLL) for a drone-mounted surveillance radar system. The primary objective is to create a stable frequency source capable of enabling precise obstacle detection and collision avoidance for delivery drones. The project centers on a Colpitts oscillator-based Voltage-Controlled Oscillator (VCO) as the core of the frequency synthesis system, integrated with frequency multiplier and divider chains, a mixer-based phase detector, and an active loop filter. Methods include circuit simulation and tuning using Keysight ADS MATLAB Simulink.
Digital Clock and Data Recovery
Sept 2025 - Nov 2025
Implemented a full digital CDR system by designing, coding, and validating critical blocks such as the phase generator, clock divider, phase rotator, bang-bang phase detector, digital filter, and PRBS test source. Verified each module through functional simulations before integrating the complete architecture. Strengthened VHDL proficiency during the first phase of the project and delivered a working multi-block CDR design within a three-month timeline. Demonstrated strong debugging, digital design, and system-level validation skills throughout the projec